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irc.freenode.net #zerophone for Jun 13, 2018

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[08:48] <CRImier> https://cdn.hackaday.io/images//2657431528897620932.JPG
[08:48] <CRImier> https://cdn.hackaday.io/images//4730991528897462745.JPG
[08:48] <CRImier> three of the main PCBs didn't pass e-test, it seems
[08:48] <CRImier> thankfully, they still sent them to me
[08:48] <CRImier> (well, they were in a 10x10 panel with other PCBs, anyway)
[09:32] <mozzwald> will be interesting to see if problem is the same/similar b/w boards
[09:32] <mozzwald> maybe too small of trace somewhere?
[11:55] <CRImier> I did have problems because of USB traces being too small (on a USB hub breakout I designed)
[11:55] <CRImier> On a couple of these breakouts, the traces are interrupted
[13:15] <cboyce> I thought that bags (Dirty Cables?) were MREs at first
[13:15] <cboyce> *those bags
[15:51] <CRImier> cboyce: yep, DirtyCables

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